ΠΑΝΕΠΙΣΤΗΜΙΟ ΙΩΑΝΝΙΝΩΝ - ΤΜΗΜΑ ΠΛΗΡΟΦΟΡΙΚΗΣ SITE MAP | uoi ΕΛΛΗΝΙΚΑ | uoi ENGLISH
Computer Architecture II

(Undergraduate Course)

 

COURSE_ID:
MYE005
WEEKLY HOURS:
3, 0, 2
SEMESTER:
-
COURSE UNITS:
4
ECTS CREDITS:
5.00
YEAR 2018/2019:
YES
PREREQUISITE:
-
DESCRIPTION:
Instruction Set Architecture (ISA): design, performance evaluation, benchmarks, types of ISAs Microprocessor programming: machine code, assembly. Implementation of a pipelined processor: dependencies, result forwarding, stalls, delayed branches. Instruction-level parallelism: superscalar processors, VLIW, out of order execution, register renaming, speculative execution, branch prediction. Memory subsystem: implementation technologies, organisation and operation of main memory, cache memory, virtual memory, address translation, TLBs, cache memories with virtual or physical address indexing/tagging. Exercises and projects on simulation and evaluation of processors and cache memories.
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©2010 DEPARTMENT OF style="font-size: 0.1px;">COMPUTER SCIENCE style="font-size: 0.1px;">& ENGINEERING style="font-size: 0.1px;">UNIVERSITY style="font-size: 0.1px;">OF style="font-size: 0.1px;">IOANNINA